ADE7753 REGISTER DESCRIPTIONS
All ADE7753 functionality is accessed via the on-chip registers. Each register is accessed by first writing to the communications register and then transferring the register data. A full description of the serial interface protocol is given in the Serial Interface section of this data sheet.

 

Communications Register

W/R 0 A5 A4 A3 A2 A1 A0

 

Mode Register (09H)

The ADE7753 functionality is configured by writing to the MODE register. Table VI below summarizes the functionality of each bit in the MODE register .

6 SWRST 0 Software chip reset. A data transfer should not take place to the ADE7753 for at least 18μs after a software reset.

 

Interrupt Status Register (0BH) / Reset Interrupt Status Register (0CH) /Interrupt Enable Register (0Ah)
The Status Register is used by the MCU to determine the source of an interrupt request (IRQ). When an interrupt event occurs in the ADE7753, the corresponding flag in the Interrupt Status register is set logic high. If the enable bit for this flag is logic one in the Interrupt Enable register, the IRQ logic output goes active low. When the MCU services the interrupt it must first carry out a read from the Interrupt Status Register to determine the source of the interrupt.